1. Field of the Invention
The present invention relates to a class D amplifier system utilizing high voltage level shifting technology and an adaptive power supply, which adjusts output voltage based on audio input levels.
2. Description of the Related Art
FIG. 1 shows a typical prior art single-ended switching audio amplifier. In this typical implementation, the power supply voltage (i.e., the voltage across C2) is fixed and is controlled by PWM power supply control circuit 103. Audio-to-PWM conversion circuit 101 converts the audio input signal into a PWM signal (the carrier frequency of which must be significantly higher than the desired maximum output frequency) which, via half-bridge driver 102, controls the switching of MOSFET devices Q2 and Q3. The alternate switching of MOSFETs Q2 and Q3 provides a high voltage PWM square wave at point X. Capacitor C1 removes any DC bias in the output (which would be damaging to the output speaker load), and inductor L1 and capacitor C3 form a low pass LC filter to remove the switching frequency and leave the desired audio power signal at the load S1.
Capacitor C1 must be large, so as to not affect the output signal, and is commonly a cause of dissipation and undesirable power loss. There is a need in the art to reduce this unwanted power loss. Furthermore, even when there is no audio input or a very low level audio input signal, MOSFETs Q2 and Q3 continue to switch based on the control PWM signal, resulting in switching losses which are proportional to the power supply voltage. There is a need in the art to reduce these switching losses.
FIG. 2 shows a typical prior art full bridge switching audio amplifier, wherein like elements from FIG. 1 are represented by like reference numbers. The full bridge switching audio amplifier system has the advantage of not requiring the DC block capacitor C1 of the single-ended circuit in FIG. 1; however, the circuit of FIG. 2 requires the use of two half bridge drivers 102A and 102B (or, alternatively, a single full bridge driver) and an additional two switches (Q4 and Q5). In the implementation shown in FIG. 2, switches Q3 and Q4 are switched on together and switches Q2 and Q5 are switched on together. This results in an apparent AC waveform being supplied to the load S1. Another disadvantage of the circuit of FIG. 2 is the increased complication of the filter network, comprising two inductors (L1 and L2) and one capacitor (C2). The circuit of FIG. 2 reduces the losses associated with the use of the DC block capacitor (C1) of FIG. 1; however, the overall cost and complication of the circuit is also increased significantly. One remaining issue is that the circuit of FIG. 2 still operates with a fixed power supply voltage, and therefore the switching losses remain the same as the circuit of FIG. 1.
The Class D amplifier system of the present invention overcomes the disadvantages of the prior art circuits discussed above and provides a simple, reliable, low-cost audio amplifier circuit. The circuit of the present invention advantageously removes any DC offset at the output, and also reduces the switching losses in the power output stage by adaptively controlling the power supply based on the incoming audio signal levels.
More specifically, the Class D amplifier system of the present invention includes level-shift PWM circuitry for level-shifting and converting the input audio signal into a pulse width modulated signal, gate drive circuitry for receiving the level-shifted pulse width modulated input audio signal and converting the signal into gate drive signals for a half-bridge transistor circuit, adaptive power supply control circuitry for adjusting the magnitude of the voltage supplied to the half-bridge in accordance with the magnitude of the input signal, and a filter for removing the switching frequency from the half-bridge output to generate an amplified audio signal.
The Class D amplifier system of the present invention preferably further includes DC offset compensation circuitry for receiving the amplified output audio signal and feeding back to the input a small level of DC offset to eliminate any DC offset in the amplified output signal. Preferably, the level-shift PWM circuitry, the gate drive circuitry, the adaptive power supply control circuitry, and the DC offset compensation circuitry are all integrated in one chip.
Other features and advantages of the present invention will become apparent when the following description is read in conjunction with the accompanying drawings.